BigRAM2630 registers
BigRAM2630 is a memory expansion for the Commodore A2630 accelerator. Key features are:
- 128MBytes physical memory, up to 114.8MBytes usable
- experimental MapROM function for 1MByte Kickstarts
- 1.8MByte MByte RAM optional at $00c0.0000
- no separate software required - memory available right after power-up
- up to 1024 byte flashable code space
- special "reverse" version available for 2630 cards with the expansion connector on the wrong side
- special version for Vector 2030 accelerator
Contents |
jumper settings
Open the jumper for normal operation and write-protection of the autoconfig Flash. Closing the jumper will enable erasing/writing to the Autoconfig Flash space, and at the same time, it will change the autoconfig structure to invalidate the DiagVector, so the system won't start the code in Flash.
software download
TODO: Insert flasher software
auto configuration
BigRAM2630 uses Autoconfig, vendor ID $1212 and product ID $1a (26 decimal). The Diag Vector points to offset $4c00. Depending on the jumper setting of the card, this diag vector is labelled valid or not. The serial number is 2630 (decimal) for the "standard" version and 2631 (decimal) for the "reverse" version. The serial number for the Vector 2030 accelerator is 2632 (decimal).
Since Autoconfig is not prepared on the A2630 expansion connector (config_in and config_out lines are not there!), some tricks had to be used. BigRAM2630 will wait until the A2630 has completed it's autoconfig, and then sneak it's config nibbles into the $00e8.0000 area. After this second autoconfig step is taken, accesses to $00e8.0000 are not claimed any more, and the config chain will continue to work normally.
This would work without any further tricks, but there's a catch: The A2630 card will not pass the Reset signal from the CPU, so the Reset signal on the expansion connector will not toggle upon a soft-reset. This means that the autoconfig state machine within BigRAM2630 can't know when a reset has taken place, and when to sneak in it's config nibbles next time. To get around this problem, a combination of hardware and software is used: The Autoconfig state machine of BigRAM2630 can be reset by writing any value to address $e9.f00a. By placing a small routine that executes this write access in the $f0-DiagROM area, you make sure that BigRAM2630 will do proper autoconfig on every hard- and soft reset.
Memory Map
Areas not described in the below table are not affected by BigRAM2630. This table assumes that the autoconfig process is already completed.
| mem address | description |
|---|---|
| $00c0.0000 to $00db.ffff | optional trapdoor ram, normally switched off. This 1.8M memory space may only be switched on if no DMA-capable Zorro cards are in the system. |
| $00e0.0000 to $00e7.ffff | MapROM area (lower 512k) |
| $00e9.0000 to $00e9.0fff | autoconfig nibbles |
| $00e9.1000 to $00e9.1fff | nibble-wide RAM area |
| $00e9.2000 to $00e9.2fff | command trigger area (write-only) |
| $00e9.3000 to $00e9.3fff | status area (read-only) |
| $00e9.4000 to $00e9.4fff | Flash area Bank 0, 512 nibbles at even addresses, mirrored 4 times within this 4k-block |
| $00e9.5000 to $00e9.5fff | Flash area Bank 1, 512 nibbles at even addresses, mirrored 4 times within this 4k-block |
| $00e9.6000 to $00e9.6fff | Flash area Bank 2, 512 nibbles at even addresses, mirrored 4 times within this 4k-block |
| $00e9.7000 to $00e9.7fff | Flash area Bank 3, 512 nibbles at even addresses, mirrored 4 times within this 4k-block |
| $00e9.8000 to $00e9.ffff | reserved; writing does nothing, reading returns $f in the upper nibble of every even address. |
| $00f0.0000 to $00f7.ffff | 512k DiagROM area - normally switched off. By passing hte "enable maprom" command, this area will be made visible, effectively increasing MapROM space to 1472 KBytes |
| $00f8.0000 to $00f8.ffff | Physical Kickstart or A2630 ROM - not affected by "enable maprom" command! |
| $00f9.0000 to $00ff.ffff | MapROM area (upper 448k) - normally switched off. By passing the "enable maprom" command, both MapROM areas will be enabled at the same time. |
| $0100.0000 to $07ff.ffff | 112MByte 32-bit wide fastmem |
Status nibble
The status nibble is the high-nibble of every even byte in the status area:
| bit 7 | bit 6 | bit 5 | bit 4 | bit 3 | bit 2 | bit 1 | bit 0 |
|---|---|---|---|---|---|---|---|
| Unlock | MapROM | NoC0Mem | WWait | invalid | invalid | invalid | invalid |
Please note that control bits are not affected by a system reset. They are only set so a "safe" state on a power-up. Only the "Unlock" bit is set to 0 upon reading the autoconfig nibbles (which happens very shortly after reset).
command communication
Flashing/erasing the flash memory or setting a configuration bit is handled through a command structure on the BigRAM2630. This ensures that no unwanted changes are made by software that randomly writes to registers. Generally, all communication with the BigRAM2630 is nibble-wide, and only the high-nibble of even words is used. Reading an odd byte will return random data, and writing to an odd byte will result in the same action as writing to an even byte. It is not recommended to use this behaviour. Only even bytes or full words should be accessed.
All command communication is handled through the RAM area starting at $e9.1000. This area contains a total of 32 RAM-nibbles at even addresses. Addresses beyond the 32-nibble space are mirrored (contents repeat throughout the 4k space). After a power-up, this area will be all-zero. A reset does not affect these memory contents, so it can be used to pass information to the autoconfig Flash code on a warm-start (whatever that's good for).
The command structure is 10 nibbles and identical for all commands:
| mem address | before command trigger | after non-NOP command trigger |
|---|---|---|
| $00e9.1000 | command number | result code |
| $00e9.1002 | command parameter | result parameter |
| $00e9.1004 | magic sequence nibble 1: $9 | $f |
| $00e9.1006 | magic sequence nibble 2: $0 | $f |
| $00e9.1008 | magic sequence nibble 3: $0 | $f |
| $00e9.100a | magic sequence nibble 4: $d | $f |
| $00e9.100c | magic sequence nibble 5: $c | $f |
| $00e9.100e | magic sequence nibble 6: $0 | $f |
| $00e9.1010 | magic sequence nibble 7: $d | $f |
| $00e9.1012 | magic sequence nibble 8: $e | $f |
Execution of a command is initiated by writing any value to the trigger area starting at $e9.2000. Upon this write, command number is parsed first: For NOP commands, all memory and register contents will remain unchanged. For non-NOP commands, the magic sequence will be checked; if verified negative, error code 1 will be set by setting result code $e and result parameter $1. If verified positive, the result code and parameter will be set according to the description of the commands further down. After command trigger, the nibbles where the magic sequence had been expected will be overwritten with $f, regardless of it's earlier contents or actual result code.
command description
As described above, command codes and result codes share the same address location. Result codes and command codes have been chosen to not affect each other: All possible result codes are treated as NOP commands, so if a command is (unintentionally) triggered twice, the result codes will remain available in the RAM area. Available commands are:
| command # | parameter | description |
|---|---|---|
| $0 | none | NOP |
| $1 | none | NOP |
| $2 | $0 or $1 | Set Write-wait states. Normally 1. Can be set to 0 to increase write performance to fastmem. Experimental, you may need to set this back to 1 if you experience instability, especially on overclocked cards. |
| $3 | $0 or $1 | Set NoC0Mem. Normally 1. If set to 0, 32-bit fastmem is enabled in $c0.0000 to $db.ffff. You should only enable this memory if there are no DMA-capable Zorro cards in the system. |
| $4 | $0 or $1 | Set MapROM. Normally 0. If set to 1, MapROM will be enabled. MapROM area should be loaded with contents prior to setting this bit! |
| $5 | $0 or $1 | Set unlock bit. Normally 0. If set to 1 and the jumper on the card is closed, write/erase actions on Flash are enabled. Note that reading from any reserved area or from the config nibbles area will set the unlock bit to 0 as a safety measure. |
| $6 | $0 or $1 | Erase flash bank. For parameter $0, banks 0 and 1 of the flash rom will be erased. For Parameter $1, banks 2 and 3 of the flash rom will be erased. Will only work if the unlock bit has been set before. |
| $7 to $f | none | NOP |
Please note that control bits are not affected by a system reset. They are only set so a "safe" state on a power-up. Only the "Unlock" bit is set to 0 upon reading the autoconfig nibbles (which happens very shortly after reset).
Possible result codes are:
| result code | result parameter | description |
|---|---|---|
| $1 | $0 | command executed without error |
| $e | $1 | magic sequence wrong or missing |
| $e | $2 | can't unlock, jumper open |
| $e | $3 | can't erase, not unlocked |
| $e | $4 | bad parameter value (only $0 or $1 allowed) |
writing to flash
After unlocking and erasing a bank, you can write to the nibbles in memory areas starting at $e9.4000. Note that not every single nibble-write will execute a write into the flash memory of BigRAM2630: One byte is "collected" by first writing the first nibble (for example $e94000), which will end up in a temporary buffer of BigRAM2630. After this temp nibble has been passed, the second nibble at $e94002 can be written. BigRAM2630 will now internally store both nibbles in flash memory. This procedure is required, because the flash memory is organized in bytes on a hardware level. However, only 4 data lines to the 68030 processor are connected, hence the detour through an intermediate nibble-store.
Writing to flash will do nothing if the unlock bit is not set. This is really "nothing", not even a result code in memory area. You should therefore verify the flash contents on a nibble-by-nibble basis with your source data before reporting a successful flash to the user. Caution: This will only work after writing a full byte. Verifying the temporary buffer is not possible (and not useful either).
using MapROM
The MapROM area must be prepared before switching on the MapROM bit. This is done by directly writing into areas starting at $00f9.0000 and $00e0.0000. Further, the $f0.0000 area may be initialized with ROM patches (see "autoconfig" chapter). After this has been done, the MapROM bit can be set to 1, which will take effect immediately.
ROM binary files that differ from the installed ROM in the lower 64k area will not work, as MapROM will not cover this area for safety reasons: The A2630 ROMs are mapped there during startup, and BigRAM2630 has no means to identify when this is the case. This will be no problem if you just create a copy of the installed Kickstart ROM, but it may affect the possibility to use a different ROM image. The MapROM feature is therefore only guaranteed to work with a straight unmodified copy of your physical Kickstart ROM. Possibilities for errors are complex, and it may only be possible to give support by analyzing both the installed ROM and the new ROM image you're trying to use. Please understand that this cannot be covered in normal product support.
a word of warning: Write-wait states
The A2630 card is a huge design with lots of bus load on the data lines. In it's stock configuration, BigRAM2630 will only work if you keep the wait-state setting for write accesses at 1. A setting for 0 wait states will result in frequent crashes even with the stock 25MHz setting. It may not be possible to make your card compatible with the 0-wait state setting at all, but if you want to try anyway, your prime task is to reduce capacitive load on the data bus. This can be done by removing the FPU, replacing the EPROMs with low-power versions, removing ZIP RAM chips and maybe even fiddling around with the pullup/down resistors on the data bus. Further, the 0.8µm masks of the CPU (1F91C or "C" revisions, ceramic package only) will help making the data word valid a little sooner. 0-wait write is not covered by normal product support. It's not worth it attempting to make it work, unless you like to spend a lot of time for a gain of less than 2%. Consider it an academic endeavour.
Overclocking
BigRAM2630 is only guaranteed to work up to a host clock rate of 25MHz. If you clock your A2630 any higher than that, you'll have to switch off (or better remove) the local ZIP ram and adjust jumper settings accordingly. By eliminating influence of the A2630 local memory controller, you may be successful to run your A2630 up to 40MHz, as the memory controller components on BigRAM2630 are within specification up to that speed. Reaching this high speed may require altering one or more PALs on the host card. This is - of course - not covered in normal product support. Attempt such modifications at your own risk. BigRAM2630 won't suffer damage, but your overall system stability may be affected in a negative way.
