ACA1211 Registers

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ACA1211 is a low-cost memory card and IDE accelerator for the A1200 computer. It is NOT compatible with the ACA500 or ACA500plus. Key features are:

  • two clock ports
  • up to 11.2 MBytes usable fast memory
  • 1MB Maprom option without using any fastmem
  • autoconfig with 256 bytes flash ROM
  • IDE speeder for A1200-IDE (read-only)


jumper setting

  • set the "DeBrick" jumper to disable the autoconfig-ROM. Use in emergency cases only. This should only be required if there was a power failure during flashing and flash contents are corrupted.

Memory map

Z2-Start Z2-end CIA/Gayle area Trapdoor-start Trapdoor-end Total mem
$20.0000 $9f.ffff $a8.0000-$be.ffff $c0.0000 $d7.ffff 11200k


The ACA1211 uses autoconfig, Vendor ID 4626 ($1212) and product IDs 26 and ID 27 ($1a and $1b). It is expected that the ACA1211 is the first autoconfig device, and it will only work if it is mapped to $20.0000 and $e9.0000 by the Amiga Kickstart. The 8M Z2-space is automatically added to the freemem pool by the Autoconfig mechanism. The 64k autoconfig space is divided into 4 16k-areas:

mem address description
$e9.0000 to $e9.3fff Autoconfig nibbles
$e9.4000 to $e9.7fff Flash ROM (read-only)
$e9.8000 to $e9.bfff unused
$e9.c000 to $e9.ffff control/status register

The 64k-area (Autoconfig ID 27) has the DiagVec set to $4000. With the "De-Brick" jumper set, the vector is marked invalid.

control/status register

bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
MapROM Fast IDE BitBang EEDIO EECS EEClock EEDIOen reserved
r/w r/w r/w r/w w w w reserved

MapROM operation

While the MapROM bit is 0 (power-up state), the 512k areas starting at $e0.0000 and $f8.0000 can be written to. This can only happen "blind", as reading from these areas will return ROM contents. After these two 512k-chunks have been prepared, setting the MapROM bit to 1 will replace the physical ROMs with the contents that were just written. While MapROM is switched on, the memory areas are write-protected and thus behave like real ROMs. The MapROM bit does not change it's state when the machine is reset.

Fast IDE operation

The Fast IDE bit will be 0 after a power-up. It won't change it's state on a reset. When set to 0, the IDE timing will be standard-speed. When set to 1, read timing from the data register will be accelerated. Write timing and other IDE registers are not affected.


With the BitBang bit set to 0 (power-up default), the other bits don't have any meaning. When set to 1, the area in $e9.4000 cannot be read any more. Instead, the four bits EEDIO, EECS, EEClock and EEDIOen will control the EEPROM directly. Please refer to the ST 93C56 datasheet about how to access the chip. Please remember to set the BitBang bit back to 0 to allow random read access in $e9.4000.

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