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20-year anniversary edition (2018)
Buddha Flash (1998)



Buddha is an IDE controller for the Zorro slot of Amiga computers.

  • Autoboot with Kickstart V1.3, 2.0 and 3.1
  • two IDE-Ports for up to four IDE-devices, additional clockport
  • compatible with nearly every IDE/Atapi devices:
    • Harddisks
    • DOM modules (40-pin)
    • Industrial-CF cards (with TrueIDE Adapter, not included)
    • Atapi CD-Roms (any speed)
    • Atapi CD-changer
    • Atapi CD-Writer (with MakeCD)
    • Syquest removable media
    • LS120 (the 120MB-floppy, so-called "a-drive")
    • IDE ZIP drives
    • Atapi CD-Writer (with MakeCD)
  • Autoboot from IDE-ZIP or LS120

The IDE-timing of the Buddha controller is software-configurable: This way, you can even operate very old IDE devices on the Buddha (mode 0 devices). This feature is unique on the Amiga-market!

High speed: Even with slow harddisks like the Quantum Bigfoot, transfer rates of more than 2.2 MBytes per second can be reached. The raw data transfer rate is only limited by the zorro bus: 3.58 MBytes per second.

The drivers are written by Elaborate Bytes. You get the whole IDE-package from Elaborate Bytes: Cache CD Filesystem, Harddisk autopark, CD-Changer drivers and the CD-32 emulator (AGA chipset only). Harddisks are formatted using the HDToolbox of your workbench.

Harddisks larger than 4 GBytes have been a problem for the Amiga for a very long time. The Buddha also solves this problem: It supports the "TD64" commands, so large harddisks are no problem any longer.

For your convenience when changing over to the Buddha controller without loss of data, the Buddha can use Amiga-formatted drives right after connection without having to re-format the harddisk. Other controllers can only mount harddisks that have been formatted by an A1200 or an A4000, but the Buddha even mounts GVP or AT-Apollo formatted harddisks after running a conversion program. You don't have to backup the harddisk for that - the drive is being converted without loss of data!

Please notice that a RTC module can not be used on the clockport of the Buddha controller - this is because it uses a different chip select than the Amiga OS expects for the RTC.


  • Flash utility, readROM and older ROM files: File:Bflash.lha Caution: This is for old Buddha Flash controllers until 2007!
  • TD64 patch for FastFileSystem (necessary for harddrives larger than 4GBytes: File:Ffstd64.lha



The 20-year anniversary edition has two jumpers, J2 and J3. These jumpers control the power supply for use with DOM (Disk On Module).

WARNING: J2 and J3 MUST be open when using the controller with other devices connected via an IDE cable. Not doing so may damage the controller and/or your devices.

LED Connector

The 20-year anniversary edition has a connector for two LEDs. The middle pin must be connected to the RED wire of the LEDs, the top pin should be connected to the BLACK wire of the LED that indicates activity on the first (left) IDE port. The bottom pin should be connected to the BLACK wire of the LED that indicates activity on the second (right) IDE port.


Please notice that a RTC module can not be used on the clockport of the Buddha controller - this is because it uses a different chip select than the Amiga OS expects for the RTC.

  • connect Silversurfer facing away from the controller
  • connect RapidRoad and other iComp USB devices with a cable so the red wire faces up (to the IDE ports)

Hardware Revisions


  • released 1997, 2 IDE Ports (40-Pin) and 1x26-Pin Port for Hypercom3+/Silversurfer limited edition. (green board, all THT components)

Buddha Flash (gold edition)

  • released 1998, "gold edition" second run in 1999 - 2x IDE (40-pin), 26-Pin Port for Hypercom3+ and Clockport (of which one can be used at a time) (black board, SMD components)

Some features have been added to the new version: The controller has got a 32KByte Flash rom now, so you can install new firmware (that means a new rom) without having to open your computer. With the old version, replacement of the rom chip was necessary. Another new feature is the clock-port on the card: You can install hardware on this port, that has been designed to be used on the Amiga 1200. The hardware designed for the A1200 clock-port is very cheap, and now you can use the low-cost hardware in zorro systems. As a small "thank-you" to our devoted customers, in the second run the zorro-connector of the board is golden.

Buddha Flash Maxxelerate!

  • released in 2000, discontinued in the same year. Based on the same hardware as the Buddha Flash Gold Edition.

This special version supported the Fast-Z2 mode of the Z4 board for the A1200. It reached a good higher performance, but due to the IDE ports not being terminated, operation was not reliable with longer cables. We have therefore discontinued this product.

Buddha (Phoenix edition)

  • released 2006, 1x 40-Pin IDE and 1x 44-Pin IDE for Laptop Harddrives. Could optionally be equipped with a connector for the front-slot of the A1000-Phoenix board. (green board, SMD components, golden zorro contacts)

Buddha IDE (20-year anniversary edition)

  • released 2018, 2x 40-Pin IDE and 1x Clockport

By popular demand of our loyal customers, we have made a new production run of our successful Z2-controller. In addition to two IDE-ports, there's a clock port for hardware originally designed for the A1200 computer. A new feature of the controller is that the IDE ports can supply power for a DOM module. Modern 3.3V technology saves power and only causes moderate temperature increase inside the computer.

The controller is being shipped bundled with a 128MB DOM which contains Kickstart 1.3, 2.1 and 3.1 plus an installer that works with harddisks that are bigger than 4GB (automatic 64-bit file system installation).

Starting with controllers shipped after february 12th, 2018, the CPLD of the Buddha Flash 20-year anniversary edition has been updated to also support the Fast-Z2 mode of Z4 boards; the feature can be switched on with the BuddhaFlashTool V1.3 or higher. This implements the same functionality as the "Maxxelerate!"-version, but is expected to be much more reliable, as solid state media is not using long IDE cables these days.

register map

The following register map also applies to the IDE-part of the Catweasel Z-II (all versions).

Autoconfiguration has been implemented just as Commodore described in their manuals, no tricks have been used (for example leaving some address lines out of the equations...). If you want to configure the board yourself (for example let a Linux kernel configure the card), look at the Commodore Docs. Reading the nibbles should give this information:

Vendor number: 4626 ($1212)
product number: 0 (42 for Catweasel Z-II)
Serial number: 0
Rom-vector: $1000

The card should be a Z-II board, size 64K, not for freemem list, Rom-Vektor is valid, no second Autoconfig-board on the same card, no space preference, supports "Shutup_forever".

Setting the base address should be done in two steps, just as the Amiga Kickstart does: The lower nibble of the 8-Bit address is written to $4a, then the whole Byte is written to $48, while it doesn't matter how often you're writing to $4a as long as $48 is not touched. After $48 has been written, the whole card disappears from $e8 and is mapped to the new address just written. Make sure $4a is written before $48, otherwise your chance is only 1:16 to find the board :-).

The local memory-map is even active when mapped to $e8:

Address Description
$0-$7e Autokonfig-space, see Z-II docs.
$80-$7fd reserved
$7fe Speed-select Register: Read & Write (description see further down)
$800-$8ff IDE-Select 0 (Port 0, Register set 0)
$900-$9ff IDE-Select 1 (Port 0, Register set 1)
$a00-$aff IDE-Select 2 (Port 1, Register set 0)
$b00-$bff IDE-Select 3 (Port 1, Register set 1)
$c00-$cff IDE-Select 4 (Port 2, Register set 0, Catweasel only!)
$d00-$dff IDE-Select 5 (Port 3, Register set 1, Catweasel only!)
$e00-$eff local expansion port, on Catweasel Z-II the Catweasel registers are also mapped here. Never touch, use multidisk.device!
$f00 read only, Byte-access: Bit 7 shows the level of the IRQ-line of IDE port 0.
$f01-$f3f mirror of $f00
$f40 read only, Byte-access: Bit 7 shows the level of the IRQ-line of IDE port 1.
$f41-$f7f mirror of $f40
$f80 read only, Byte-access: Bit 7 shows the level of the IRQ-line of IDE port 2. (Catweasel only!)
$f81-$fbf mirror of $f80
$fc0 write-only: Writing any value to this register enables IRQs to be passed from the IDE ports to the Zorro bus. This mechanism has been implemented to be compatible with harddisks that are either defective or have a buggy firmware and pull the IRQ line up while starting up. If interrupts would always be passed to the bus, the computer might not start up. Once enabled, this flag can not be disabled again. The level of the flag can not be determined by software.
$fc1-$fff mirror of $fc0
$1000-$ffff Buddha-Rom with offset $1000 in the rom chip. The addresses $0 to $fff of the rom chip cannot be read. Rom is Byte-wide and mapped to even addresses.

The IDE ports issue an INT2. You can read the level of the IRQ-lines of the IDE-ports by reading from the three (two for Buddha-only) registers $f00, $f40 and $f80. This way more than one I/O request can be handled and you can easily determine what driver has to serve the INT2. Buddha and Catweasel expansion boards can issue an INT6. A seperate memory map is available for the I/O module and the sysop's I/O module.

The IDE ports are fed by the address lines A2 to A4, just as the Amiga 1200 and Amiga 4000 IDE ports are. This way existing drivers can be easily ported to Buddha. A move.l polls two words out of the same address of IDE port since every word is mirrored once. movem is not possible, but it's not necessary either, because you can only speedup 68000 systems with this technique. A 68020 system with fastmem is faster with move.l.

If you're using the mirrored registers of the IDE-ports with A6=1, the Buddha doesn't care about the speed that you have selected in the speed register (see further down). With A6=1 (for example $840 for port 0, register set 0), a 780ns access is being made. These registers should be used for a command access to the harddisk/CD-Rom, since command accesses are Byte-wide and have to be made slower according to the ATA-X3T9 manual.

Now for the speed-register: The register is byte-wide, and only the upper three bits are used (Bits 7 to 5). Bit 4 must always be set to 1 to be compatible with later Buddha versions (if I'll ever update this one). I presume that I'll never use the lower four bits, but they have to be set to 1 by definition. The values in this table have to be shifted 5 bits to the left and or'd with $1f (this sets the lower 5 bits).

All the timings have in common: Select and IOR/IOW rise at the same time. IOR and IOW have a propagation delay of about 30ns to the clocks on the Zorro bus, that's why the values are no multiple of 71. One clock-cycle is 71ns long (exactly 70,5 at 14,18 Mhz on PAL systems).

value function
0 (Default after reset) 497ns Select (7 clock cycles) , IOR/IOW after 172ns (2 clock cycles) (same timing as the Amiga 1200 does on it's IDE port without accelerator card)
1 639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles)
2 781ns Select (11 clock cycles), IOR/IOW after 314ns (4 clock cycles)
3 355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
4 355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles)
5 355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles)
6 1065ns Select (15 clock cycles), IOR/IOW after 314ns (4 clock cycles)
7 355ns Select, (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)

When accessing IDE registers with A6=1 (for example $84x), the timing will always be mode 0 8-bit compatible, no matter what you have selected in the speed register: 781ns select, IOR/IOW after 4 clock cycles (=314ns) aktive.

All the timings with a very short select-signal (the 355ns fast accesses) depend on the accelerator card used in the system: Sometimes two more clock cycles are inserted by the bus interface, making the whole access 497ns long. This doesn't affect the reliability of the controller nor the performance of the card, since this doesn't happen very often.

All the timings are calculated and only confirmed by measurements that allowed me to count the clock cycles. If the system is clocked by an oscillator other than 28,37516 Mhz (for example the NTSC-frequency 28,63636 Mhz), each clock cycle is shortened to a bit less than 70ns (not worth mentioning). You could think of a small performance boost by overclocking the system, but you would either need a multisync monitor, or a graphics card, and your internal diskdrive would go crazy, that's why you shouldn't tune your Amiga this way.

Giving you the possibility to write software that is compatible with both the Buddha and the Catweasel Z-II, The Buddha acts just like a Catweasel Z-II with no device connected to the third IDE-port. The IRQ-register $f80 always shows "no IRQ here" on the Buddha, and accesses to the third IDE port are going into data's Nirwana on the Buddha.

changes for Buddha Flash

  • Product ID and vendor ID are the same.
  • Serial number is different from 0. Serial number means:
0 not a Flash Buddha, additional features not available.
1 Flash with 32K Xicor EEprom
2 Flash with 32K Samsung EEprom
3 Flash with 64K AMD Flashrom PLCC32
4 Flash with 128K AMD Flashrom PLCC32 (*)
5 Flash with 256K AMD Flashrom PLCC32 (only 240K usable) (*)
  • The 28-pin socket is now an EEProm socket, not compatible with Eproms any more. The pinout is only 28c256 compatible.
  • more than 30K rom possible, with 32-pin PLCC socket up to 240K.
  • write to $fc0 enables IRQs, resets bank-swap and all bank-bits.
  • write to $f00 swaps 16K-banks of the rom, so the formally "covered" 2K are usable now. When using 256K Flash, this is bank-bit 18. The swap will be executed anyway, but the user/programmer won't notice, because a different 128K-bank is chosen.
  • write to $f40 sets banking-bit 16. Caution: This also disables IRQs! Remember to reset before ending your program!

(*): Cannot be upgraded by user, because GAL chip has to be exchanged ("Bigrom"- GAL)

with "BigRom" GAL:

  • write to $f80 sets banking-bit 17. reset by write to $fc0.

The enable-write routine is not documented publicly. Please use the flashtool provided by iComp.

expansion port timing

Both expansion ports of the Buddha use the same timing.

If you want to design hardware that works properly on the clockport of the Buddha controller, take a look at the two following pictures. Both are snapshots from an Agilent mixed-signal scope in Logic Analyzer mode. Speed is 50ns per div, the labels should be self-explanatory. The two data lines and the three address lines give enough information about the rest of the bus. Note that these measurements have been made on an old Buddha Flash controller. The Buddha Flash 20-year Anniversary Edition uses slightly different timing to cope with newer IDE devices. In detail: The Select line may go low at any time and stay low very long after the cycle has already ended. Make sure that you only drive data on the bus only if both IOR and Select are active!

write access

write access

Addresses are valid thoughout the cycle, they are stable for more than 50ns before the cycle, and they remain valid at least 40ns after the cycle. Do not rely on the address lines staying valid after deassertion of SEL! The end of the Zorro cycle is detected by deassertion of AS (address strobe), so it is very likely that accelerator cards do a change of address lines fairly quick after AS=high (especially in A2000 computers).

Data becomes valid about 25ns after cycle start, and remains valid at least 40ns after the cycle.

IOW is asserted about 140ns after cycle-start, and is deasserted after about 200ns. A whole cycle is about 350ns long.

read access

read access

Addresses are valid thoughout the cycle, they are stable for more than 50ns before the cycle, and they remain valid at least 40ns after the cycle. Do not rely on the address lines staying valid after deassertion of SEL! The end of the Zorro cycle is detected by deassertion of AS (address strobe), so it is very likely that accelerator cards do a change of address lines fairly quick after AS=high (especially in A2000 computers).

Data lines are 3-stated, and should be driven by your hardware as fast as possible. Consult a 68K manual for minimum access times and the exact point where the CPU samples the data.

CPLD Upgrade

JTAG pinout

Buddha Flash 20-year Anniversary Edition controllers that have been shipped prior to february 23rd, 2018, have an old CPLD revision that implements the exact timing of the Buddha Phoenix Edition. However, it has turned out that newer IDE devices (made 2004 or later) do not like this timing, and that certain A2000 accelerators can completely break compatibility with practically all IDE devices. We have therefore continued development and provide a CPLD upgrade that fixes compatibility with newer IDE devices, SATA adapters, DOM modules and CF cards. This upgrade is free to all Buddha Flash 20-year Anniversary Edition customers. Although anyone can download it, only those who own the controller have a license. The files may not be used to offer a paid upgrade service.

We are working on a tool that lets you apply the upgrade with an Amiga computer. If you already own a Xilinx-compatible JTAG cable (Xilinx Platform cable for USB or Parallelport cable), we are providing the CPLD upgrade in two industry-standard formats: Jedec and XSVF, whatever your software supports. Download: File:Buddha CPLD.zip.

You may need to adapt the pinout of your JTAG cable to the pinout of the Buddha controller. Please refer to the picture on the right for the exact pinout. The header is a standard 1/10" (2.54mm) 2x5-pin header.

The pinout is the one originally used by Altera for the ByteBlaster and USB-Blaster JTAG adapters. The same pinout has been illustrated for the low-cost version of the Xilinx "Parallel cable III". It has the advantage of being tolerant to misalignment and wrong polarity. In addition to the writing in the picture on the right, here's the signal names once again:

pin# 1 2 3 4 5 6 7 8 9 10
Signal name TCK GND TDO 3.3V IO voltage TMS N.C. N.C. N.C. TDI GND

Make your own programmer cable

The CPLD of the Buddha Flash 20-year Anniversary Edition can be re-programmed by the Amiga, using a cable that goes from the the Parallel port to the JTAG port of the Buddha. The recommended length is 50cm (20 inches). A total of six lines have to be connected:

JTAG pin# Parallel pin# Signal name
1 6+7 TCK
2 20 GND
3 3 TDO
5 4 TMS
9 5 TDI
10 13 GND

We are documenting this cable ahead of production - this is a service to those customers who don't want to wait until production of the upgrade cables has been completed. If you are not the type of person to make this cable on your own, just wait for the cable to arrive in the mail. We will send a free cable to every customer who has bought a Buddha Flash 20-year anniversary edition with the old CPLD contents. However, you'd do us a favour and let us know if you do NOT need the cable, as this will save us the cost for shipping. We hope to finish and ship all cables before the end of march 2018.

Using the Upgrade cable

A second Amiga is not required. It is possible to use the same Amiga for running the upgrade tool that the Buddha is installed in.

Insert a 2x5-pin header into the IDC connector at the JTAG-end of the cable as shown in the picture on the right. Place the male DB25 connector into the parallel port of your Amiga. Insert the pin header into the open holes of the Buddha controller and push the connector sideways to make safe contact. In the picture in the right, the connector is "pushed down". Once you've established this connection, start the Buddha upgrade tool in a shell of your Amiga. It will check the connection and prompt you to press "Y". That's shift-Y for a capital Y - you may want to use caps lock, since you have one hand occupied by the connector.

After pressing Shift-Y, hold the connector safely in place for about 15 seconds while the upgrade is performed. The mouse pointer of the Amiga will be frozen while the upgrade tool is working; this is required to make sure that no other software is accessing the parallel port during the upgrade process.

The CPLD Upgrade tool can be downloaded here: File:BuddhaCPLD.lha


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