VarIO
VarIO is a multi-IO card for the Amiga computer with 1x high-speed serial and 1x EPP/ECP parallel port. The name was chosen due to it's large variety of connection possibilities. Initially, the card was available in two versions, one for the A1200 clockport and the other for Zorro slots of BigBox-Amigas. Only the Zorro version is still manufactured.
The parallel interface has been speeded up dramatically compared to its predecessor Hypercom: It has also got 16 bytes of fifo memory that lower the CPU load by far. The ECP mode (extended capabilities port) improves communication speed with modern printers.
The special thing about the board is it's great possibilities to be connected to the computer: At first sight, it looks like a Zorro board that is equipped with our standard expansion ports: A clockport for connection of a Silversurfer, and a 26-pin expansion port. In case the VarIO is not plugged into a Zorro slot, it becomes an expansion module for one of our Zorro-boards, or an A1200 clockport-module (special version) that is connected with a cable. This results in eight different ways of using the VarIO:
- Zorro-board as base model: 1 x ser, 1 x par
- Zorro-board with Silversurfer: 2 x ser, 1 x par
- VarIO on X-Surf Ethernet: 1 x ser, 1 x par
- VarIO on ISDN Surfer: 1 x ser, 1 x par
- VarIO on Buddha (Flash): 1 x ser, 1 x par
- VarIO on Catweasel Z-II: 1 x ser, 1 x par
- VarIO on A1200 clockport: 1 x ser, 1 x par (also Z4 clockports!)
- VarIO on VarIO: 2 x ser, 2 x par
All these ways of connecting can of course be combined in one system!
Contents |
hardware information
Vendor number: 4626 ($1212)
product number: 7
Serial number: 1
The board supports the "shutup_forever" option. The serial interface is based on a 16C550 UART, and the parallel interface is based on a ST78C36a parallel IO chip.
download
The VarIO drivers can also be used for the Silversurfer serial port. File:Vario.lha
SetupVarIO update for A500 users: File:SetupVarIO.zip
Memory map
If used in Zorro mode, VarIO is a 64K Zorro board. The red LED is on when in Zorro mode. All addresses are to be added to the board offset:
$0000-$7fff Config-Nibbles
$8000-$803f clock-port or sub-VarIO
if a sub-VarIO is connected to the 26-pin port, the sub-serial
is at $8020, and the sub-parallel is at $8000.
$8040-$805f parallel port (ST78C36a)
$8060-$807f serial port (16c550)
If VarIO is used on a clock-port, the red LED is off (Add-On mode):
clockport+$00 parallel port clockport+$20 serial port
Note: On the A600 Silversurfer-adapter, the register spacing is different, therefore the serial port starts at clockport+$8000.
You could also think of using a sub-VarIO on the clock-port, but this would be a waste of money: The clockport version has a more expensive RS232 driver (the +5V only type), and the cable is more expensive. Use a 26-pin cable instead. It also passes the +/-12V lines to the sub-board. Only one of the expansion ports can be used, either the clockport, or the 26-pin port, but not both at the same time!
The parallel port is a Startech/Exar ST78C36a EPP/ECP parallel port with 16 byte Fifo, clocked at 24Mhz. The EPP function can only be used on this board with banking, because the EPP-DPort is only available for the software with a write to the Modem Control register of the 16c550 UART chip. The banking-bit is "out2" bit of the Modem Control register (bit 3). After a reset, it is set to 0, so the EPP-DPorts are visible, and no other parallel port registers can be accessed. Program bit 3 of MCR to "1" to have the correct parallel port register map!
The serial port is a California Micro Devices CM16c550PE, clocked at 7,3728 Mhz, just like on the Silversurfer. Existing drivers should be adapted pretty quickly, because even the address spacing is the same! The datasheet of that chip is hard to find in electronic form (PDF or something). For programming information, please consult the Startech 16c550 datasheet; it describes a software compatible chip.
note: None of individual Computers' designs uses the out2 bit of the MCR. it is recommended to initialize all UARTs with bit 3 of MCR set to 1 in order to avoid clashes with the parallel port on the VarIO. I want to make the access possible, however, I don't expect anyone to use this feature.
register addresses
Register spacing on the 26-pin ports of one of our Zorro-cards is totally different. The third column of the following tables applies to these boards as carrier-cards for VarIO:
Buddha Buddha Flash Catweasel Z-II (all versions) ISDN Surfer X-Surf
| parallel port (offset plus register) with bit 3 of MCR=1 | |||
|---|---|---|---|
| Zorro offset | A600 adapter offset | 26-pin offset | register name |
| $00 | $0000 | $58 | Data/ECP-AFIFO |
| $04 | $1000 | $5a | DSR |
| $08 | $2000 | $5c | DCR |
| $0c | $3000 | $5e | EPP-APort |
| $10 | $4000 | $78 | CONF-A |
| $14 | $5000 | $7a | CONF-B |
| $18 | $6000 | $7c | ECR (extended control) |
| parallel port (offset plus register) with bit 3 of MCR=0: | |||
|---|---|---|---|
| Zorro offset | A600 adapter offset | 26-pin offset | register name |
| $00 | $0000 | $58 | EPP-D Port register A |
| $04 | $1000 | $5a | EPP-D Port register B |
| $08 | $2000 | $5c | EPP-D Port register C |
| $0c | $3000 | $5e | EPP-D Port register D |
| serial port (offset plus register) | |||
|---|---|---|---|
| Zorro offset | A600 adapter offset | 26-pin offset | chip register number |
| $00 | $0000 | $d8 | Register 0 |
| $04 | $1000 | $da | Register 1 |
| $08 | $2000 | $dc | Register 2 |
| $0c | $3000 | $de | Register 3 |
| $10 | $4000 | $f8 | Register 4 |
| $14 | $5000 | $fa | Register 5 |
| $18 | $6000 | $fc | Register 6 |
| $1c | $7000 | $be | Register 7 |
Note that the 26-pin offset for register 7 of the 16c550 UART is NOT a typo. It's really $be, not $fe as you might expect.
Interrupts
Both ports (serial and parallel) issue an IRQ6. The IRQ line of the 16c550 is directly translated to IRQ6 with no additional logic in between (just like the Silversurfer). If used in a Zorro slot, IRQs are disabled until the autoconfig procedure has been passed, this ensures system stability.
The ST78C36 has several IRQ lines. VarIO only uses IRQ line number 7 (pin 19 of the PLCC44 package). For IRQs to be passed properly to the Amiga, the chip must be configured to use this IRQ line. All other IRQ configs will not work with VarIO!
The parallelport chip has strobed IRQs that would be too short for certain multitasking applications. VarIO stores a strobed IRQ in a flipflop, and holds IRQ6 until it is served by the software. The flipflop is cleared by any access to the parallelport chip, including the unused register $1c of that chip. The access can either be a read or a write access.
VarIO gives no additional possibilities to tell whether an IRQ has been issued by a certain port or not. See the chip documentation for these functions.
expansion port timing
Both expansion ports of the VarIO use the same timing.
If you want to design hardware that works properly on the clockport of VarIO, take a look at the two following pictures. Both are snapshots from an Agilent mixed-signal scope in Logic Analyzer mode. Speed is 50ns per div, the labels should be self-explanatory. The two data lines and the three address lines give enough information about the rest of the bus.
write access
Addresses are valid thoughout the cycle, they are stable for more than 50ns before the cycle, and they remain valid at least 40ns after the cycle. Do not rely on the address lines staying valid after deassertion of SEL! The end of the Zorro cycle is detected by deassertion of AS (address strobe), so it is very likely that accelerator cards do a change of address lines fairly quick after AS=high (especially in A2000 computers).
Data becomes valid about 25ns after cycle start, and remains valid at least 40ns after the cycle.
IOW is asserted about 140ns after cycle-start, and is deasserted after about 200ns. A whole cycle is about 350ns long.
read access
Addresses are valid thoughout the cycle, they are stable for more than 50ns before the cycle, and they remain valid at least 40ns after the cycle. Do not rely on the address lines staying valid after deassertion of SEL! The end of the Zorro cycle is detected by deassertion of AS (address strobe), so it is very likely that accelerator cards do a change of address lines fairly quick after AS=high (especially in A2000 computers).
Data lines are 3-stated, and should be driven by your hardware as fast as possible. Consult a 68K manual for minimum access times and the exact point where the CPU samples the data.
IOR is asserted with the beginning of the cycle (together with SEL), and it is deasserted at the end of the cycle, also together with SEL.
Serial cable pinout
Silversurfer and VarIO use the same serial cable. Please note that there are two different industry-standards that were commonly used. Silversurfer and VarIO uses one of these standards. If you are fine with the included 25-pin serial port, we recommend to use exactly that included 25-pin cable. If you want to use a 9-pin serial port with your VarIO or Silversurfer, please make sure that it uses the correct pinout. The following pictures show how to identify the right cable for use with Silversurfer and VarIO:
wrong pinout for DB9 connector
correct pinout for DB9 connector
correct pinout for DB9 connector (bottom view)
Resellers
Please shop locally. Our partners are listed in alphabetical order.
- Alinea Computer (Germany)
- Amiga Kit (UK, US)
- F.H.U.EDEN Komputery (Poland)
- GGS Data (Sweden)
- Protovision (Germany) (Retro Products only)
- Relec Software & Hardware (Switzerland)
